The chip select logic for a certain DRAM chip in a memory system design is shown below. Assume that the memory system has 16address lines denoted by A15 to A0. What is the range of addresses (in hexadecimal) of the memory system that can get enabled by the chip select (CS) signal?

Question

Examsnet · Accepted Answer

Correct Answer is : C800 to CFFF

GATE Computer Science (CS) 2019 Solved Papers