In figure A,VA and VB are two input voltages (either 5V or 0V) When VA=0,VB=0 Both D1 and D2 are OFF, so V0=0, When VA=1 i.e. 5V,VB=0 i.e. 0V D1 is ON but D2 is OFF So, V0=1 i.e. 5V When VA=0 i.e. 0V,VB=1 i.e. 5V D1 is OFF and D2 is ON So, V0=1 i.e. 5V. Similarly, when VA=VB=1 Both D1 and D2 are ON So, V0=1 i.e. 5V. We get the final truth table on the basis of inputs and their corresponding output.
A
B
Y
0
0
0
0
1
1
1
0
1
1
1
1
∴ The given circuit (A) is an OR gate. In figure B, it is a transistor in common emitter configuration which gives high output at low input and low output at high input. Hence, this circuit behaves as NOT Gate.